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DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
PC1857A
2
SOUND CONTROL IC WITH SURROUND AND I C BUS
DESCRIPTION
The PC1857A is a sound control IC with I2C bus. It has functions to control volume, balance, and tone, and a phase shift matrix surround function. The surround function achieves wide sound expansion using only two front speakers. Three modes can be selected: movie mode that increases the presence of sound with stereo sound input, music mode emphasizing vocal music, and simulated mode that gives expansion and left and right sound depth with monaural sound input. The PC1857A can perform all control (mode switching, volume control and so on) using I2C.
FEATURES
* Volume control function * Balance control function : Attenuation adjustable from 0 to -80 dB in 64 steps : The difference in attenuation adjustable from 0 to -80 dB in 64 steps
* Tone (bass, treble) control function : Adjustable in 32 steps from +10 to -10 dB * Surround function (gain adjustable) : Three modes (movie, music, and simulated) * Mute function * Mixing function * Output selection function (for two mono channels input) * All parameters can be controlled via I2C bus.
APPLICATIONS
* TV, PC monitor
ORDERING INFORMATION
Part Number Package 30-pin plastic shrink DIP (400 mil)
PC1857ACT
The information in this document is subject to change without notice.
Document No. S12453EJ1V1DS00 (1st edition) Date Published March 1998 N CP(K) Printed in Japan
(c)
1997
PC1857A
SYSTEM BLOCK DIAGRAM
* TV
Tuner
PIF & SIF
Color, intensity, and deflecting signal processor
RGB output Vertical output Horizontal output
CRT
DTS interface
PC1854 (US-MTS)
MTS decoder L
PC1857A
Surround R Volume Balance Tone Power amplifier
Speaker L
R
PD17052 PD17053
Tuning microcontroller
I2C bus interface
PC1316C
PC2800A Remote control reception amplifier
PIN photo diode
Remark DTS: Digital Tuning System MTS: Multichannel Television Sound
2
PC1857A
* PC monitor
Speaker Sound input L R
PC18757A
L Surround Volume Balance Tone Power amplifier R I2C bus interface
PC1316C
Signal input R G B V.sync H.sync C.sync RGB input processor Video amplifier RGB drive CRT
Sync. signal separator HD VD
OSD
PLL
PC1885 PC1883
Control Sync. signal processor Gometry compensation
Deflection compensation drive Vertical drive Horizontal drive
Yoke
Panel switch
Microcontroller H-F/V PD78014Y
High-voltage unit EEPROMTM D/A converter PC6221
3
PC1857A
BLOCK DIAGRAM
820 k 0.082 F MFO
29 30
680 pF MFI LF1
28
22 F + 1 VCC DGND 2
24
12 V ADS SDA SCL
22 21 20
2.2 F + 0.047 F OFL1 OFL2
19 18
VCC
15
LBC
10 9
3300 pF LTC
3.3 F VOL-C
17
23
+ LPF Lin + 2.2 F
26
1 VCC 2
I2C bus interface L Offset absorption Tone control Lout
+ L+R + Phase shifter PS1 PS2 PS3 PS4 + Effect control LPF R+ + L+ + Output select
+ +
14
Volume, balance control/ mute
Rin + 2.2 F
+ R + Offset absorption Tone control
13
27
Rout
MIX + 25 2.2 F
2 3 4 5 6 1 11 12 8 7 16
FC1 FC2 FC3 FC4 0.1 F 0.022 F 2200 pF 0.022 F
LF2 1000 pF
AGND
OFR1 OFR2 RBC + 0.047 F 2.2 F
RTC
+ BAL-C
3300 pF 3.3 F
4
PC1857A
PIN CONFIGURATION (Top View)
30-pin plastic shrink DIP (400 mil)
AGND FC1 FC2 FC3 FC4 LF2 RTC RBC LTC LBC OFR1 OFR2 Rout Lout VCC
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
MFI MFO LF1 Rin Lin MIX
1 2 VCC
DGND ADS SDA SCL OFL1 OFL2 VOL-C BAL-C
1 2
VCC
: Reference Voltage Filter : Slave Address Select : Analog Ground : Balance Control Offset Absorption : Ground for I C Bus : Phase Shift Filter : L-channel Bass Capacitor : Low-pass Filter : L-channel Signal Input : L-channel Signal Output : L-channel Treble Capacitor : Monaural Filter Input
2
MFO MIX OFL1, OFL2 OFR1, OFR2 RBC Rin Rout RTC SCL SDA VCC VOL-C
: Monaural Filter Output : Mixer Input : L-channel Offset Absorption : R-channel Offset Absorption : R-channel Bass Capacitor : R-channel Signal Input : R-channel Signal Output : R-channel Treble Capacitor : Serial Clock for I C Bus : Serial Data for I C Bus : Power Supply : Volume Control Offset Absorption
2 2
ADS AGND BAL-C DGND FC1-FC4 LBC LF1, LF2 Lin Lout LTC MFI
5
PC1857A
CONTENTS 1. 2. 3. PIN FUNCTIONS.............................................................................................................................. ATTENTIONS.................................................................................................................................... I2C BUS INTERFACE......................................................................................................................
3.1 Data Transfer.......................................................................................................................................... 3.1.1 3.1.2 3.1.3 3.2.1 3.2.2 3.2.3 Start condition ............................................................................................................................ Stop condition ............................................................................................................................ Data transfer .............................................................................................................................. 1-byte data transfer.................................................................................................................... Successive data transfer............................................................................................................ Acknowledge..............................................................................................................................
7 14 15
15 15 16 16 17 18 18 18
3.2 Data Transfer Format.............................................................................................................................
4.
EXPLANATION OF EACH COMMAND ........................................................................................
4.1 Subaddress List ..................................................................................................................................... 4.2 Initialization ............................................................................................................................................ 4.3 Surround Function................................................................................................................................. 4.4 Explanation of Each Command ............................................................................................................ 4.4.1 4.4.2 4.4.3 4.4.4 4.4.5 4.4.6 4.4.7 4.4.8 4.4.9 Mute ........................................................................................................................................... Output selection ......................................................................................................................... Surround mode .......................................................................................................................... Surround effect .......................................................................................................................... Mix ............................................................................................................................................. Automatic increment .................................................................................................................. Volume level .............................................................................................................................. Balance ...................................................................................................................................... Bass level...................................................................................................................................
19
19 20 20 21 21 21 22 23 23 24 25 25 26 26
4.4.10 Treble level ................................................................................................................................
5. 6.
ELECTRICAL CHARACTERISTICS ............................................................................................... CHARACTERISTIC CURVES..........................................................................................................
6.1 Frequency Characteristic in Each Mode.............................................................................................. 6.2 Control Characteristic ........................................................................................................................... 6.3 I/O Characteristic ...................................................................................................................................
27 33
33 36 38
7. 8.
PACKAGE DRAWING ..................................................................................................................... RECOMMENDED SOLDERING CONDITIONS .............................................................................
39 40
6
PC1857A
1. PIN FUNCTIONS
Table 1-1. Pin Function List (1/7)
Pin Number 1 Pin Name AGND
15 1
Equivalent Circuit
Description Ground for analog signal. Pin voltage: approx. 0.0 V
23
2
FC1
VCC 3k 36 k 18 k VCC 36 k 3k
Connection pin for capacitor which determines time constant of phase shifter. Pin voltage: approx. 6.0 V
2 0.1 F
3
FC2
VCC 36 k 18 k VCC 3 k 36 k 3 k
3 2200 pF
4
FC3
VCC 3k 36 k 18 k VCC 36 k 3k
4 0.022 F
Remark Pin voltage is the reference value when VCC = 12 V.
7
PC1857A
Table 1-1. Pin Function List (2/7)
Pin Number 5
Pin Name FC4
VCC
Equivalent Circuit
Description Connection pin for capacitor which determines time constant of phase shifter. Pin voltage: approx. 6.0 V
3k 36 k 18 k VCC 36 k
3k
5 0.022 F
6
LF2
VCC 17.7 k 17.7 k VCC 5k 5k
Low-pass filter. Pin voltage: approx. 6.0 V
6 1000 pF
7
RTC
VCC 3k 12 k VCC 3k
Connection pin for capacitor for treble boost/cut frequency characteristic of R-channel signal. Pin voltage: approx. 6.0 V
7 3300 pF
8
RBC
VCC 3k 13.8 k VCC 3k
Connection pin for capacitor for bass boost/cut frequency characteristic of R-channel signal. Pin voltage: approx. 6.0 V
8 0.047 F
Remark Pin voltage is the reference value when VCC = 12 V.
8
PC1857A
Table 1-1. Pin Function List (3/7)
Pin Number 9
Pin Name LTC
VCC
Equivalent Circuit
Description Connection pin for capacitor for treble boost/cut frequency characteristic of L-channel signal. Pin voltage: approx. 6.0 V
3k 12 k VCC
3k
9 3300 pF VCC 3k 13.8 k VCC 3k
10
LBC
Connection pin for capacitor for bass boost/cut frequency characteristic of L-channel signal. Pin voltage: approx. 6.0 V
10 0.047 F
11
OFR1
VCC 5k VCC 6k 6k
Pin that absorbs offset voltage of R channel. Pin voltage: approx. 6.0 V
11 5k + 5k 2.2 F VCC 12 1/2VCC 60 k
12
OFR2
3k
3k
Remark Pin voltage is the reference value when VCC = 12 V.
9
PC1857A
Table 1-1. Pin Function List (4/7)
Pin Number 13
Pin Name Rout
Equivalent Circuit
VCC VCC 2 k VCC 10 k 3 k
Description R-channel signal output pin. Pin voltage: approx. 6.0 V
13
2 k
14
Lout
VCC 2 k VCC 10 k
VCC 3 k
L-channel signal output pin. Pin voltage: approx. 6.0 V
14
2 k
15
VCC
15 1
Supply voltage. Pin voltage: approx. 12.0 V
23
16
BAL-C
VCC + 16 50 k
VCC
Pin for D/A converter capacitor for balance control. Pin voltage: approx. 4.8 V
3.3 F
Remark Pin voltage is the reference value when VCC = 12 V.
10
PC1857A
Table 1-1. Pin Function List (5/7)
Pin Number 17 Pin Name VOL-C
VCC + 17 50 k
Equivalent Circuit
VCC
Description Pin for D/A converter capacitor for volume control. Pin voltage: approx. 6.0 V
3.3 F
18
OFL2
VCC 1/2VCC 60 k 18 VCC + 2.2 F VCC 5k 6k 6k 3k 3k
Pin that absorbs offset voltage of L channel. Pin voltage: approx. 6.0 V
19
OFL1
19
5k 5k
20
SCL
20 5 k
Serial clock line (I C bus clock Input) pin. Pin voltage: approx. 0.0 V
2
21
SDA
Serial data line (I C bus data I/O) pin Pin voltage: approx. 0.2 V
5 k 21
2
22
ADS
22 5 k
Slave address select pin. Pin voltage: approx. 0.0 V
23
DGND
15 1
GND for I C bus signal. Pin voltage: approx. 0.0 V
2
23
Remark Pin voltage is the reference value when VCC = 12 V.
11
PC1857A
Table 1-1. Pin Function List (6/7)
Pin Number 24
Pin Name 1 VCC 2
Equivalent Circuit
VCC 5k VCC
Description Filter pin for middle point of supply voltage. Pin voltage: approx. 6.0 V
VCC 22 F 24 + 20 k
20 k
90 k
25
MIX
VCC
1/2VCC 3k 60 k 3k
Mixing signal input pin. Input impedance: 60 k Pin voltage: approx. 6.0 V
5k
25 2.2 F +
MIX
26
Lin
VCC
1/2VCC 3k 60 k 3k
L-channel signal input pin. Input impedance: 60 k Pin voltage: approx. 6.0 V
5k
26 2.2 F +
Lin
27
Rin
VCC
1/2VCC 3k 60 k 3k
R-channel signal input pin. Input impedance: 60 k Pin voltage: approx. 6.0 V
5k
27 2.2 F +
Rin
Remark Pin voltage is the reference value when VCC = 12 V.
12
PC1857A
Table 1-1. Pin Function List (7/7)
Pin Number 28
Pin Name LF1
Equivalent Circuit
18 k VCC
Description Low-pass filter. Pin voltage: approx. 6.0 V
5 k
5 k
28 680 pF
29
MFO
VCC 29 1k 18 k
Filter output pin for surround function (simulated mode) (see 4.3 Surround Function). Pin voltage: approx. 6.0 V
30
MFI
820 k
0.082 F
VCC 15 k
Filter input pin for surround function (simulated mode) (see 4.3 Surround Function). Pin voltage: approx. 6.0 V
47 k
30
Remark Pin voltage is the reference value when VCC = 12 V.
13
PC1857A
2. ATTENTIONS
(1) Attention on Pop Noise Reduction When changing the surround mode, use the mute function (approx. 200 ms) for pop noise reduction (see 4.4.1 Mute). When turning ON/OFF power to the PC1857A, use the external mute function for pop noise reduction. (2) Attention on Supply Voltage Drive data on the I C bus after supply voltage of total application system becomes stable.
2
14
PC1857A
3. I C BUS INTERFACE
The PC1857A has serial bus function. This serial bus (I C bus) is a double-wired bus developed by Philips. It is composed of 2 wires: serial clock line (SCL) and serial data line (SDA). The PC1857A has built-in I C bus interface circuit, and five rewritable registers (8 bits).
2 2
2
SCL (Serial Clock Line) The host CPU outputs a serial clock to synchronize with the data. The PC1857A takes in the serial data based on this clock. Input level is compatible with CMOS. Clock frequency is 0 to 100 kHz. SDA (Serial Data Line) The host CPU outputs the data which is synchronized with the serial clock. The PC1857A takes in this data based on the clock. Input level is compatible with CMOS. Figure 3-1. Internal Equivalent Circuit of Interface Pin
Rp SCL SDA
Rp
PC1857A
3.1
Data Transfer
3.1.1 Start condition Start condition is made by SDA falling from "High" to "Low" while SCL is "High" as shown in Figure 3-2. When this start condition is received, the PC1857A takes in the data synchronized with the serial clock after that.
15
PC1857A
3.1.2 Stop condition Stop condition is made by SDA rising from "Low" to "High" while SCL is "High" as shown in Figure 3-2. When this stop condition is received, the PC1857A stops taking in or outputting data. Figure 3-2. Start/Stop Condition of Data Transfer
3.5 V SDA 1.5 V 4.0 s MIN. 3.5 V SCL 1.5 V Start Stop 4.7 s MIN.
3.1.3 Data transfer When transferring data, the data must be changed while SCL is "Low" as shown in Figure 3-3. Never change the data while SCL is "High". Figure 3-3. Data Transfer
SDA
Note 1
Note 2
SCL
Notes 1. Data hold time for I C device: 300 ns MIN., Data hold time for CPU: 5 s MIN.
2
2. Data setup time: 250 ns MIN. Remark Clock frequency: 0 to 100 kHz
16
PC1857A
3.2 Data Transfer Format
Figure 3-4 shows an example of data transfer in write mode. Figure 3-4. Example of Data Transfer in Write Mode
SA0 Subaddress
Slave address SDA
Data
D6 D5 D4 D3 D2 D1 D0 W ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK D7 D6 D5 D4 D3 D2 D1 D0 ACK
SCL
Remark W: Write mode, ACK: Acknowledge bit Data is composed of 8 bits. One acknowledge bit always follows these 8 bits of data. Data must be transferred starting from the MSB. The 1 byte immediately following the start condition specifies a slave address (chip address). This slave address is composed of 7 bits. Table 3-1 shows the slave address of the PC1857A. This slave address is registered by Philips. Table 3-1. Slave Address of PC1857A
Slave Address Bias Voltage of ADS (Pin 22) D6 5V GND 1 1 D5 0 0 D4 0 0 D3 0 0 D2 1 1 D1
Note
D0 0 0
1 0
Note The user can set bit D1 freely. 0: Bias voltage of ADS (pin 22) is 0 V. 1: Bias voltage of ADS (pin 22) is 5 V. The 1 bit following the slave address is a read/write bit which specifies the direction of the data to be subsequently transferred. Write "0" to this read/write bit because the PC1857A is write mode only. The byte following the slave address is the subaddress byte of the PC1857A. The PC1857A has five subaddresses, from SA0 to SA4, and each of these addresses is composed of 8 bits. The data to be set to a subaddress follows this subaddress byte.
17
PC1857A
3.2.1 1-byte data transfer The format in which 1-byte data is to be transferred is as follows:
Start Slave address
Write ACK mode
Subaddress
ACK
Data
ACK Stop
3.2.2 Successive data transfer The PC1857A has an automatic increment function which can be used to transfer successive data (refer to 4.4.6 Automatic increment). By using this function, the internal subaddress is automatically incremented if a slave address and a subaddress have been set, so that the data from subsequent subaddresses can be transferred in succession. Incrementing the subaddress of the PC1857A is stopped when the subaddress reaches "04H". The format in which 5 bytes of data are to be transferred in succession by using the automatic increment function is as follows:
Start Slave address
Write ACK mode
Subaddress
ACK
Data 1
ACK
Data 2
ACK
Data 5
ACK Stop
The host CPU transfers "00H" as subaddress SA0 after start and slave addresses, as shown above. Data SA0 is transferred after this subaddress SA0, and without transferring the stop condition the data SA1, SA2, SA3, and SA4 are transferred successively, and then the stop condition is transferred. To successively change data at a fixed subaddress, for example to turn up/down the volume, turn off the automatic increment function. 3.2.3 Acknowledge On the I C bus, an acknowledge bit is appended to the 9th bit following the data. This acknowledge bit is used to judge whether data transfer has been successful. The host CPU judges whether data transfer has been successful or not, depending on whether the status of the acknowledge bit is "H" or "L". When the acknowledge bit is "L", it indicates success. When the acknowledge bit is "H", it indicates failure of transfer or forced release of bus (NAK status). The NAK status occurs when a wrong slave address is transferred to a slave IC or data transfer from slave side is finished in the read status.
2
18
PC1857A
4. EXPLANATION OF EACH COMMAND 4.1 Subaddress List
Bit Subaddress 00H MSB D7 Output mute 0: OFF 1: ON 0 D5 0 0 1 1 01H Mix 0: OFF 1: ON Automatic increment 0: OFF 1: ON 02H 0 Automatic increment 0: OFF 1: ON 03H 0 Automatic increment 0: OFF 1: ON 04H 0 Automatic increment 0: OFF 1: ON 0 Treble level Gain Data : : Boost 11111 to to 0 10000 to to Cut 00000 0 Balance L volume : R volume : Data Bass level Gain Data : : Boost 11111 to to 0 10000 to to Cut 00000 : MIN MAX 111111 to to to MAX MAX 100000 to to to MAX MIN 000000 Output select D4 0 1 0 1 Lout L L R L+R Rout R L R L+R D3 0 0 1 1 Surround mode D2 0 1 0 1 Mode Simulated Music Movie OFF D1 0 0 1 1 LSB D0 Surround effect D0 0 1 0 1 Gain 0 dB -3 dB -6 dB -12 dB
D6
D5
D4
D3
D2
D1
Volume level Volume Data : : MAX 111111 to to MIN 000000
Cautions 1. Be sure to write "0" to bit D7 of subaddresses 02H through 04H, bit D6 of subaddress 00H, and bit D5 of subaddresses 03H and 04H. 2. The surround mode is OFF: 00H (D3, D2 = 11) in any mode other than stereo mode is selected for output: 00H (D5, D4 = 00).
19
PC1857A
4.2 Initialization
After power application, be sure to initialize the subaddresses as shown below. Table 4-1. Initialization of PC1857A (recommendation value)
Bit Subaddress 00H 01H 02H 03H 04H MSB D7 0 0 0 0 0 0 - - - - 0 - 1 0 0 0 - 0 1 1 1 - 0 0 0 1 - 0 0 0 0 - 0 0 0 LSB D0 0 - 0 0 0
D6
D5
D4
D3
D2
D1
Caution Until initialization is completed, mute using an external unit. Remark - : Don't care.
4.3
Surround Function
For how to set the surround mode, refer to the table below. Table 4-2. Setting Surround Mode
Setting Surround Mode Simulated Music Movie OFF D3 0 0 1 1 Subaddress: 00H D2 0 1 0 1 Units of Phase Shifter 4 units 1 unit 4 units - Through Description Effect Monaural to pseudo-stereo Stereo sound to surround
Caution When changing the surround mode, use the mute function (approx. 200 ms) for pop noise reduction.
20
PC1857A
4.4 Explanation of Each Command
4.4.1 Mute The mute function can be turned ON/OFF by using data of bit D7 of subaddress 00H. Figure 4-1. Mute
D7 Subaddress 00H Mute D6 0 Output mute 0 1 Mute: OFF Mute: ON D5 D4 D3 D2 D1 D0
Output selection
Surround mode
Surround effect
Caution When changing the surround mode, and when turning ON/OFF power, use the mute function (approx. 200 ms) for pop noise reduction.
4.4.2 Output selection Output can be selected by using data of bits D5 and D4 of subaddress 00H. Figure 4-2. Output Selection
D7 Subaddress 00H Mute D6 0 D5 D4 D3 D2 D1 D0
Output selection
Surround mode Output selection Data D5 D4 0 0 1 1 0 1 0 1 Output Lout L L R L+R Rout R L R L+R
Surround effect
Caution The surround mode is OFF (D3, D2 = 11) in modes other than the stereo mode (D5, D4 = 00).
21
PC1857A
4.4.3 Surround mode The following surround modes can be selected by using data of bits D3 and D2 of subaddress 00H. Simulated : Simulated stereo sound for monaural source. The difference between the signal that has gone through HPF and the signal that has gone through LPF is calculated, and the phase of the difference is shifted and added to the original signal. The simulated stereo effect is created if the output frequency characteristics of the L-channel and R-channel signals is comb-shaped. Music Movie OFF : : : Surround sound for stereo source. The phase of the differential signal between L and R channels (L-R signal) is rotated by a phase shifter (1-unit), and is added to the original signal. Surround sound for stereo source. The phase of the differential signal between L and R channels (L-R signal) is rotated by a phase shifter (4-unit), and is added to the original signal. Original signal as is. Figure 4-3. Surround Mode
D7 Subaddress 00H Mute D6 0 D5 D4 D3 D2 D1 D0
Output selection
Surround mode
Surround effect Surround mode Data Mode D3 D2 0 0 1 1 0 1 0 1 Simulated Music Movie OFF
Caution The surround mode is OFF (D3, D2 = 11) if the stereo mode is not selected by the output selection bits (D5, D4 = 00).
22
PC1857A
4.4.4 Surround effect The surround effect can be changed in four steps by using the data of bits D1 and D0 of subaddress 00H. Figure 4-4. Surround Effect
D7 Subaddress 00H Mute D6 0 D5 D4 D3 D2 D1 D0
Output selection
Surround mode Surround effect Data Gain D1 D0 0 0 1 1 0 1 0 1 0 dB -3 dB -6 dB -12 dB
Surround effect
4.4.5 Mix Mixing of the signal input to the MIX pin can be turned ON/OFF by using the data of bit D7 of subaddress 01H. Figure 4-5. Mix
D7 Subaddress 01H Mix D6 Automatic increment Mix 0 1 Mix: OFF Mix: ON D5 D4 D3 D2 D1 D0
Volume level
23
PC1857A
4.4.6 Automatic increment The automatic increment function can be turned ON/OFF by using the data of bit D6 of subaddresses 01H through 04H. This is effective when transmitting data successively (refer to 3.2.2 Successive data transfer). Figure 4-6. Automatic Increment
D7 Subaddress 01H-04H Don't care D6 Automatic increment Automatic increment 0 1 Automatic increment: OFF Automatic increment: ON D5 D4 D3 Don't care D2 D1 D0
Caution Subaddress 00H does not have an automatic increment function. It is always set to ON. The automatic increment function automatically increments the subaddress when data is transferred successively. Automatic increment ON : The subaddress is automatically incremented immediately after byte data with D6 = 1 has been transferred. This setting is useful if the data at every subaddress is to be set at once for initialization. The subaddress is always incremented immediately after the data of subaddress: 00H has been transferred. Automatic increment OFF : The subaddress is fixed immediately after byte data with D6 = 0 has been transferred. This setting is useful when the data at the same subaddress is to be successively changed, for example to turn up/down the volume. There is an automatic increment function ON/OFF bit in subaddresses 01H through 04H. Incrementing
subaddresses is individually controlled by the automatic increment function ON/OFF bit of each subaddress. For example, if the automatic increment function of subaddress 01H is turned ON, and that of subaddress 02H is turned OFF, the subaddress is automatically incremented from 01H to 02H, and is fixed to 02H. Even if the automatic increment function ON/OFF bit of subaddress 04H is set to ON, the subaddress is not incremented. If the next data is transferred after the data of 04H has been set (acknowledge bit: L), acknowledge enters the NAK status (acknowledge bit: H), and data transfer from the host CPU is stopped.
24
PC1857A
4.4.7 Volume level The volume of output can be controlled in 64 steps by using the data of bits D5 through D0 of subaddress 01H. Figure 4-7. Volume Level
D7 Subaddress 01H Mix D6 Automatic increment D5 D4 D3 D2 D1 D0
Volume level Volume level Data Volume D5-D0 000000 to 111111 MIN. to MAX.
4.4.8 Balance The balance of output of the Lout and Rout pins can be controlled in 64 steps by using the data of bits D5 through D0 of subaddress 02H. Figure 4-8. Balance
D7 Subaddress 02H 0 D6 Automatic increment D5 D4 D3 Balance Balance Data D5-D0 000000 to 100000 to 111111 Volume Lout MAX. to MAX. to MIN. Rout MIN. to MAX. to MAX. D2 D1 D0
25
PC1857A
4.4.9 Bass level The bass level of output can be controlled in 32 steps by using the data of bits D4 through D0 of subaddress 03H. Figure 4-9. Bass Level
D7 Subaddress 03H 0 D6 Automatic increment D5 0 D4 D3 D2 Bass level Bass level Data Gain D4-D0 00000 to 10000 to 11111 Cut to 0 to Boost D1 D0
4.4.10 Treble level The treble level of output can be controlled in 32 steps by using the data of bits D4 through D0 of subaddress 04H. Figure 4-10. Treble Level
D7 Subaddress 04H 0 D6 Automatic increment D5 0 D4 D3 D2 Treble level Treble level Data Gain D4-D0 00000 to 10000 to 11111 Cut to 0 to Boost D1 D0
26
PC1857A
5. ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings (Unless otherwise specified, TA = 25 C)
Parameter Supply voltage Input signal voltage I C bus input signal voltage Permissible package dissipation Operating temperature Storage temperature
2
Symbol VCC VIN VCNT PD TA Tstg
Condition Without signal Pins Lin, Rin, MIX Pins SDA, SCL TA = 75 C VCC = 12 V
Rating 14.0 VCC VCC + 0.2 500 -20 to +75 -40 to +125
Unit V V V mW C C
Caution If any of the parameters exceeds the absolute maximum ratings, even momentarily, the quality of the product may be impaired. The absolute maximum ratings are values that may physically damage the product(s). Be sure to use the product(s) within the ratings. Recommended Operating Conditions (Unless otherwise specified, TA = 25 C)
Rating Parameter Supply voltage Input signal voltage I C bus input voltage (H) I C bus input voltage (L)
2 2
Symbol VCC VIN VcntH VcntL
Condition MIN. Gain between input and output: 0 dB VCC = 12 V, gain between input and output: 0 dB Pins SDA, SCL 8.1 0.0 3.5 -0.1 TYP. 12.0 1.4 5.0 0 MAX. 13.2 7.9 6.0 +1.5
Unit V Vp-p V V
27
PC1857A
Electrical Characteristics (1/5) (Unless otherwise specified, VCC = 12 V, TA = 25 C, RH 70%, f = 1 kHz, VIN = 0.5 Vr.m.s., no load)
Subaddress Data Parameter Circuit current Maximum input voltage Lin Lout Maximum input voltage Rin Rout Distortion rate Lin Lout Distortion rate Rin Rout Voltage gain Lin Lout Voltage gain Rin Rout Voltage gain MIX Lout Voltage gain MIX Rout Ripple rejection ratio VCC Lout Ripple rejection ratio VCC Rout Output noise voltage (surround OFF) Lout Output noise voltage (surround OFF) Rout Cross talk Lin Rout Cross talk Rin Lout Symbol ICC VOM-L Test Condition 00 No signal Lin = variable (tested) Lout = THD 1% Rin = variable (tested) Rout = THD 1% Lin = 2.0 Vr.m.s. Rin = GND Lin = GND Rin = 2.0 Vr.m.s. Lin = 0.5 Vr.m.s. Rin = GND Lin = GND Rin = 0.5 Vr.m.s. MIX = 0.5 Vr.m.s. Lin, Rin = GND 0D BF 20 10 10 0D 3F 20 10 10 0D 2B 20 10 10 0D 0D 01 3F 3F 02 20 20 03 10 10 04 10 10 MIN. 12 2.8 TYP. 18 3.1 MAX. 25 - - mA Vr.m.s. Rating Unit
VOM-R
2.8 - - -1.0 -1.0
3.1
Vr.m.s.
THDL
0.1
0.5
%
THDR
0.1
0.5
%
GV-LL
0
+1.0
dB
GV-RR
0
+1.0
dB
GV-ML
5.0
6.0
7.0
dB
GV-MR
5.0 - - -
6.0 - - -
7.0 -50 -50
dB
SVRR-L
SVRR-R
VCC = 100 mVr.m.s. f = 100 Hz Lin, Rin = GND
0D
14
20
10
10
dB
dB
Vn-L (OFF)
Rg = 0 , JIS-A
0D
3F
20
10
10
50
Vr.m.s.
Vn-R (OFF)
-
-
50
Vr.m.s.
CT-L
Lin = 0.5 Vr.m.s. Rin = GND Lin = GND Rin = 0.5 Vr.m.s.
0D
3F
20
10
10
- -
-80 -80
-70 -70
dB
CT-R
dB
28
PC1857A
Electrical Characteristics (2/5) (Unless otherwise specified, VCC = 12 V, TA = 25 C, RH 70%, f = 1 kHz, VIN = 0.5 Vr.m.s., no load)
Subaddress Data Parameter Volume attenuation 1 Lin Lout1 Volume attenuation 2 Lin Lout2 Volume attenuation 3 Lin Lout3 Volume attenuation deviation Rin R/Lout1 Volume attenuation deviation Rin R/ Lout2 Volume attenuation deviation Rin R/ Lout3 Mute attenuation Lin Lout Mute attenuation Rin Rout Balance attenuation L1 Lin Lout1 Balance attenuation L2 Lin Lout2 Balance attenuation L3 Lin Lout3 Balance attenuation L4 Lin Lout4 Balance attenuation R1 Rin Rout1 Balance attenuation R2 Rin Rout2 Balance attenuation R3 Rin Rout3 Balance attenuation R4 Rin Rout4 Symbol VOL-L1 Test Condition 00 Lin = 0.5 Vr.m.s. Rin = GND 0D 01 3F 02 20 03 10 04 10 MIN. -1.5 -20.0 - -1.0 TYP. 0 -14.0 - MAX. +1.5 -7.0 -80.0 dB Rating Unit
VOL-L2
20
dB
VOL-L3
00
dB
VOL-RL1
Lin = GND Rin = 0.5 Vr.m.s. Difference from VOL-L1 Lin = GND Rin = 0.5 Vr.m.s. Difference from VOL-L2 Lin = GND Rin = 0.5 Vr.m.s. Difference from VOL-L3 Lin = 2.0 Vr.m.s. Rin = GND Lin = GND Rin = 2.0 Vr.m.s. Lin = 0.5 Vr.m.s. Rin = GND
0D
3F
20
10
10
0
+1.0
dB
VOL-RL2
20
-1.0
0
+1.0
dB
VOL-RL3
00
-3.0
0
+3.0
dB
MUTE-L
8D
3F
20
10
10
- - -1.5 -2.5 -15.0 - -1.5 -2.5 -15.0 -
- -
-80.0 -80.0
dB
MUTE-R
dB
BAL-L1
0D
3F
01
10
10
0 -0.5 -10.0 -
+1.5
dB
BAL-L2
28
+1.0 -5.0 -80.0
dB
BAL-L3
30
dB
BAL-L4
3F
dB
BAL-R1
Lin = GND Rin = 0.5 Vr.m.s.
0D
3F
3F
10
10
0 -0.5 -10.0 -
+1.5
dB
BAL-R2
18
+1.0 -5.0 -80.0
dB
BAL-R3
10
dB
BAL-R4
01
dB
29
PC1857A
Electrical Characteristics (3/5) (Unless otherwise specified, VCC = 12 V, TA = 25 C, RH 70%, f = 1 kHz, VIN = 0.5 Vr.m.s., no load)
Subaddress Data Parameter Tone control, bass characteristic Lin Lout1 Tone control, bass characteristic Lin Lout2 Tone control, bass characteristic Lin Lout3 Tone control, bass characteristic deviation Rin Rout1/Lout1 Tone control, bass characteristic deviation Rin Rout2/Lout2 Tone control, bass characteristic deviation Rin Rout3/Lout3 Tone control, treble characteristic Lin Lout1 Tone control, treble characteristic Lin Lout2 Tone control, treble characteristic Lin Lout3 Tone control, treble characteristic deviation Rin Rout1/Lout1 Tone control, treble characteristic deviation Rin Rout2/Lout2 Tone control, treble characteristic deviation Rin Rout3/Lout3 Symbol BASS-L1 Test Condition 00 f = 100 Hz Lin = 0.5 Vr.m.s. Rin = GND 0D 01 3F 02 20 03 1F 04 10 MIN. 7.0 TYP. 10.0 MAX. 13.0 dB Rating Unit
BASS-L2
10
-2.0
0
+2.0
dB
BASS-L3
01
-13.0
-10.0
-7.0
dB
BASS-RL1
f = 100 Hz, Lin = GND Rin = 0.5 Vr.m.s. Difference from BASS-L1
0D
3F
20
1F
10
-1.0
0
+1.0
dB
BASS-RL2
f = 100 Hz, Lin = GND Rin = 0.5 Vr.m.s. Difference from BASS-L2
10
-1.0
0
+1.0
dB
BASS-RL3
f = 100 Hz, Lin = GND Rin = 0.5 Vr.m.s. Difference from BASS-L3
01
-1.0
0
+1.0
dB
TREB-L1
f = 10 kHz Lin = 0.5 Vr.m.s. Rin = GND
0D
3F
20
10
1F
7.0
10.0
13.0
dB
TREB-L2
10
-2.0
0
+2.0
dB
TREB-L3
01
-13.0
-10.0
-7.0
dB
TREB-RL1
f = 10 kHz, Lin = GND Rin = 0.5 Vr.m.s. Difference from TREB-L1
0D
3F
20
10
1F
-1.0
0
+1.0
dB
TREB-RL2
f = 10 kHz, Lin = GND Rin = 0.5 Vr.m.s. Difference from TREB-L2
10
-1.0
0
+1.0
dB
TREB-RL3
f = 10 kHz, Lin = GND Rin = 0.5 Vr.m.s. Difference from TREB-L3
01
-1.0
0
+1.0
dB
30
PC1857A
Electrical Characteristics (4/5) (Unless otherwise specified, VCC = 12 V, TA = 25 C, RH 70%, f = 1 kHz, VIN = 0.5 Vr.m.s., no load)
Subaddress Data Parameter Surround voltage gain, music mode Lin Lout Surround voltage gain, music mode Lin Rout Surround voltage gain, movie mode Lin Lout Surround voltage gain, movie mode Lin Rout Surround voltage gain, simulated mode LRin Lout1 Surround voltage gain, simulated mode LRin Lout2 Surround voltage gain, simulated mode LRin Lout3 Surround voltage gain, simulated mode LRin Rout1 Surround voltage gain, simulated mode LRin Rout2 Surround voltage gain, simulated mode LRin Rout3 Symbol MUS-L Test Condition 00 f = 1 kHz Lin = 0.5 Vr.m.s. Rin = GND 05 01 3F 02 20 03 10 04 10 MIN. 3.5 TYP. 5.5 MAX. 7.5 dB Rating Unit
MUS-R
-2.5
-0.5
+1.5
dB
MOV-L
f = 1 kHz Lin = 0.5 Vr.m.s. Rin = GND
09
3F
20
10
10
3.0
7.0
11.0
dB
MOV-R
0
4.0
8.0
dB
SIM-L1
f = 250 Hz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s. f = 1 kHz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s. f = 4 kHz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s. f = 250 Hz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s. f = 1 kHz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s. f = 4 kHz Lin = 0.5 Vr.m.s. Rin = 0.5 Vr.m.s.
01
3F
20
10
10
-0.5
+3.5
+6.5
dB
SIM-L2
-
-3.0
+4.5
dB
SIM-L3
2.0
6.0
10.0
dB
SIM-R1
01
3F
20
10
10
-
-5.5
-1.0
dB
SIM-R2
0
3.0
6.0
dB
SIM-R3
-
-7.0
+5.0
dB
Remark For the surround mode, refer to 4.3 Surround Function.
31
PC1857A
Electrical Characteristics (5/5) (Unless otherwise specified, VCC = 12 V, TA = 25 C, RH 70%, f = 1 kHz, VIN = 0.5 Vr.m.s., no load)
Subaddress Data Parameter Output selector, DC offset Lin Lout Output selector, DC offset Lin Lout Output selector, DC offset Rin Lout Output selector, DC offset Rin Rout Output selector, DC offset Rin Rout Output selector, DC offset Lin Rout Symbol OFST LRL Test Condition 00 No signal Voltage conversion of Lout Lout: L output R output No signal Voltage conversion of Lout Lout: L output L+R output No signal Voltage conversion of Lout Lout: R output L+R output No signal Voltage conversion of Rout Rout: R output L output No signal Voltage conversion of Rout Rout: R output L+R output No signal Voltage conversion of Rout Rout: L output L+R output 1D 2D 1D 3D 2D 3D 2D 1D 2D 3D 1D 3D -100 0 +100 mV -100 0 +100 mV 3F 20 10 10 -100 0 +100 mV -100 0 +100 mV -100 0 +100 mV 01 3F 02 20 03 10 04 10 MIN. -100 TYP. 0 MAX. +100 mV Rating Unit
OFST LL + RL
OFST RL + RL
OFST RLR
OFST RL + RR
OFST LL + RR
32
PC1857A
6. CHARACTERISTIC CURVES 6.1 Frequency Characteristic in Each Mode
VCC = 12 V, VIN = 0.5 Vr.m.s. Stereo mode: subaddress 00H (D5, D4) = (0,0) Surround effect (0 dB attenuation): subaddress 00H (D1, D0) = (0,0) (1) OFF mode Lch/Rch
Subaddress 00H (D3, D2) = (1, 1) 16 12 8
Gain G (dB)
4 0 -4 -8 -12 -16 10 100 Frequency f (Hz) 1k 10 k
33
PC1857A
(2) Movie mode Lch/Rch
Subaddress 00H (D3, D2) = (1, 0) 16 12 8
Gain G (dB)
4 0 -4 -8 -12 -16 10 100 Frequency f (Hz) 1k 10 k
(3) Music mode Lch/Rch
Subaddress 00H (D3, D2) = (0, 1) 16 12 8
Gain G (dB)
4 0 -4 -8 -12 -16 10 100 Frequency f (Hz) 1k 10 k
34
PC1857A
(4) Simulated mode Lch
Subaddress 00H (D3, D2) = (0, 0) 16 12 8
Gain G (dB)
4 0 -4 -8 -12 -16 10 100 1k Frequency f (Hz) 10 k
(5) Simulated mode Rch
Subaddress 00H (D3, D2) = (0, 0)
16 12 8
Gain G (dB)
4 0 -4 -8 -12 -16 10 100 1k Frequency f (Hz) 10 k
35
PC1857A
6.2 Control Characteristic
VCC = 12 V, VIN = 0.5 Vr.m.s Surround mode (OFF): subaddress 00H (D3, D2) = (1, 1) (1) Volume control characteristic
f = 1 kHz 0
-20
Attenuation (dB)
-40
-60
-80
000000
001000
010000
011000
100000
101000
110000
111000
111111
Subaddress data: 01H (D5-D0)
(2) Balance control characteristic
f = 1 kHz 0 L R
-20
Attenuation (dB)
-40
-60
R
L
-80
000000
001000
010000
011000
100000
101000
110000
111000
111111
Subaddress data: 02H (D5-D0)
36
PC1857A
(3) Tone control characteristic (bass/treble) Bass: f = 100 Hz, treble: f = 10 kHz
10
5
Attenuation (dB)
0
-5
-10
00000
00100
01000
01100
10000
10100
11000
11100
11111
Subaddress data (bass): 03H (D4-D0) (treble): 04H (D4-D0)
(4) Tone frequency characteristic
20 A 10 C
Gain G (dB)
0
C, D
A, B
-10 B D
-20 10
100
1k Frequency f (Hz)
10 k
100 k
Curve A
Subaddress 03H
Data (D4-D0) 11111 00001 11111
B C 04H D
00001
37
PC1857A
6.3 I/O Characteristic
Vcc = 12 V Volume (MAX.) Balance (center) Bass (FLAT) Treble (FLAT) : Subaddress 01H (D5-D0) = (111111) : Subaddress 02H (D5-D0) = (100000) : Subaddress 03H (D4-D0) = (10000) : Subaddress 04H (D4-D0) = (10000)
Surround mode (OFF) : Subaddress 00 (D3, D2) = (1, 1)
5.0
Output signal voltage (Vr.m.s.)
1.0
0.5
0.1
0.05
0.01 0.05 0.1 0.5 1.0 5.0 Input signal voltage (Vr.m.s.)
38
PC1857A
7. PACKAGE DRAWING
30 PIN PLASTIC SHRINK DIP (400 mil)
30 16
1 A
15
K J I L
H G
F D N
M
C B
M
R
NOTES 1. Controlling dimension millimeter.
ITEM A B C D F G H I J K L M N R
MILLIMETERS 27.30.2 1.78 MAX. 1.778 (T.P.) 0.500.10 1.00.15 3.20.3 0.51 MIN. 3.450.2 5.08 MAX. 10.16 (T.P.) 8.60.2 0.25 +0.10 -0.05 0.17 0~15
INCHES 1.075 +0.008 -0.009 0.070 MAX. 0.070 (T.P.) 0.020 +0.004 -0.005 0.039 +0.007 -0.006 0.1260.012 0.020 MIN. 0.136 +0.008 -0.009 0.200 MAX. 0.400 (T.P.) 0.339 +0.008 -0.009 0.010 +0.004 -0.003 0.007 0~15 S30C-70-400B-2
2. Each lead centerline is located within 0.17 mm (0.007 inch) of its true position (T.P.) at maximum material condition. 3. Item "K" to center of leads when formed parallel.
39
PC1857A
8. RECOMMENDED SOLDERING CONDITIONS
It is recommended to solder this product under the conditions described below. For details of the recommended soldering conditions, refer to the Semiconductor Device Mounting Technology Manual (C10535E). For soldering methods and conditions other than those recommended, consult NEC. Soldering condition of through-hole type
PC1857ACT: 30-pin plastic shrink DIP (400 mil)
Soldering Method Wave soldering (only pins) Partial heating Soldering Condition Soldering bath temperature: 260 C MAX., Time: 10 seconds Pin temperature: 300 C MAX., Time: 3 seconds MAX. (per pin)
Caution Apply wave soldering only to the pins, and exercise care that solder does not directly contact the package.
40
PC1857A
[MEMO]
41
PC1857A
[MEMO]
42
PC1857A
[MEMO]
43
PC1857A
Purchase of NEC I C components conveys a license under the Philips I C Patent Rights to use these components in an I C system, provided that the system conforms to the I C Standard Specification as defined by Philips.
2 2
2
2
EEPROM is a trademark of NEC Corp.
The application circuits and their parameters are for reference only and are not intended for use in actual design-ins.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96. 5

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